XE2RCS-31>APLRG1,XE2RCS-34*,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,XE2RCS-34*,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,XE2RCS-34*,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.05V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.02V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.05V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:>https://github.com/richonguzman/LoRa_APRS_iGate 2024.06.28
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.05V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.02V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.02V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.03V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.04V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.05V
XE2RCS-31>APLRG1,WIDE1-1,qAR,XE2RCS-21:!LA_%=4{I`# xGLoRa APRS PENITENTE Batt=5.02V